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CODES
2001
IEEE
15 years 8 months ago
A design framework to efficiently explore energy-delay tradeoffs
Comprehensive exploration of the design space parameters at the system-level is a crucial task to evaluate architectural tradeoffs accounting for both energy and performance const...
William Fornaciari, Donatella Sciuto, Cristina Sil...
149
Voted
FAST
2003
15 years 6 months ago
Using MEMS-Based Storage in Disk Arrays
Current disk arrays, the basic building blocks of highperformance storage systems, are built around two memory technologies: magnetic disk drives, and non-volatile DRAM caches. Di...
Mustafa Uysal, Arif Merchant, Guillermo A. Alvarez
139
Voted
PPSC
1997
15 years 6 months ago
Improving Memory-System Performance of Sparse Matrix-Vector Multiplication
Sparse matrix-vector multiplication is an important kernel that often runs inefficiently on superscalar RISC processors. This paper describes techniques that increase instruction-...
Sivan Toledo
MICRO
2007
IEEE
129views Hardware» more  MICRO 2007»
15 years 11 months ago
A Framework for Coarse-Grain Optimizations in the On-Chip Memory Hierarchy
Current on-chip block-centric memory hierarchies exploit access patterns at the fine-grain scale of small blocks. Several recently proposed techniques for coherence traffic reduct...
Jason Zebchuk, Elham Safi, Andreas Moshovos
139
Voted
IPPS
2006
IEEE
15 years 10 months ago
Quantifying and reducing the effects of wrong-path memory references in cache-coherent multiprocessor systems
High-performance multiprocessor systems built around out-of-order processors with aggressive branch predictors execute many memory references that turn out to be on a mispredicted...
Resit Sendag, Ayse Yilmazer, Joshua J. Yi, Augustu...