Sciweavers

1720 search results - page 210 / 344
» eg 2008
Sort
View
DATE
2008
IEEE
114views Hardware» more  DATE 2008»
15 years 4 months ago
Operating System Controlled Processor-Memory Bus Encryption
—Unencrypted data appearing on the processor– memory bus can result in security violations, e.g., allowing attackers to gather keys to financial accounts and personal data. Al...
Xi Chen, Robert P. Dick, Alok N. Choudhary
DATE
2008
IEEE
217views Hardware» more  DATE 2008»
15 years 4 months ago
A Coarse-Grained Array based Baseband Processor for 100Mbps+ Software Defined Radio
The Software-Defined Radio (SDR) concept aims to enabling costeffective multi-mode baseband solutions for wireless terminals. However, the growing complexity of new communication ...
Bruno Bougard, Bjorn De Sutter, Sebastien Rabou, D...
DATE
2008
IEEE
157views Hardware» more  DATE 2008»
15 years 4 months ago
Logical Reliability of Interacting Real-Time Tasks
We propose the notion of logical reliability for real-time program tasks that interact through periodically updated program variables. We describe a reliability analysis that chec...
Krishnendu Chatterjee, Arkadeb Ghosal, Thomas A. H...
DSN
2008
IEEE
15 years 4 months ago
Integration and evaluation of Multi-Instance-Precommit schemes within postgreSQL
Multi-Instance-Precommit (MIP) has been recently presented as an innovative transaction management scheme in support of reliability for Atomic Transactions in multitier (e.g. Web-...
Paolo Romano, Francesco Quaglia
DSN
2008
IEEE
15 years 4 months ago
Towards an understanding of anti-virtualization and anti-debugging behavior in modern malware
Many threats that plague today’s networks (e.g., phishing, botnets, denial of service attacks) are enabled by a complex ecosystem of attack programs commonly called malware. To ...
Xu Chen, Jonathon Andersen, Zhuoqing Morley Mao, M...