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ISQED
2010
IEEE
123views Hardware» more  ISQED 2010»
14 years 11 months ago
Yield-constrained digital circuit sizing via sequential geometric programming
Circuit design under process variation can be formulated mathematically as a robust optimization problem with a yield constraint. Existing methods force designers to either resort...
Yu Ben, Laurent El Ghaoui, Kameshwar Poolla, Costa...
WISEC
2010
ACM
14 years 9 months ago
Attacks on physical-layer identification
Physical-layer identification of wireless devices, commonly referred to as Radio Frequency (RF) fingerprinting, is the process of identifying a device based on transmission imperf...
Boris Danev, Heinrich Luecken, Srdjan Capkun, Kari...
CF
2010
ACM
14 years 9 months ago
Efficient cache design for solid-state drives
Solid-State Drives (SSDs) are data storage devices that use solid-state memory to store persistent data. Flash memory is the de facto nonvolatile technology used in most SSDs. It ...
Miaoqing Huang, Olivier Serres, Vikram K. Narayana...
INFOCOM
2010
IEEE
14 years 8 months ago
Fair Scheduling in Cellular Systems in the Presence of Noncooperative Mobiles
—We consider the problem of ’fair’ scheduling the resources to one of the many mobile stations by a centrally controlled base station (BS). The BS is the only entity taking d...
Veeraruna Kavitha, Eitan Altman, Rachid El Azouzi,...
CARDIS
2010
Springer
187views Hardware» more  CARDIS 2010»
15 years 4 months ago
Improved Fault Analysis of Signature Schemes
At ACISP 2004, Giraud and Knudsen presented the first fault analysis of DSA, ECDSA, XTR-DSA, Schnorr and ElGamal signatures schemes that considered faults affecting one byte. The...
Christophe Giraud, Erik Woodward Knudsen, Michael ...