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93
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ERSA
2009
175views Hardware» more  ERSA 2009»
14 years 10 months ago
The Speedy DDR2 Controller For FPGAs
Ray Bittner
108
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ERSA
2009
91views Hardware» more  ERSA 2009»
14 years 10 months ago
Configuration with Self-Configured Datapath: A High Speed Configuration Method for Dynamically Reconfigurable Processors
Configuration with Self-configured Data Path (CSDP) is a high speed configuration data loading method for Dynamically Reconfigurable Processors (DRPs). By using a prepared configu...
Toru Sano, Yoshiki Saito, Hideharu Amano
132
Voted
ERSA
2009
387views Hardware» more  ERSA 2009»
14 years 10 months ago
Implementation of the Gauss-Newton Algorithm for Non-linear Least-mean-squares Fitting in FPGA Devices
Abstract-- The paper presents the implementation of nonlinear least-squares regression in a Field Programmable Gate Array (FPGA) device. The implemented algorithm is very performan...
Andrea Abba, Antonio Manenti, Andrea Suardi, Angel...
107
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ERSA
2009
109views Hardware» more  ERSA 2009»
14 years 10 months ago
An Implementation of Security Extensions for Data Integrity and Confidentiality in Soft-Core Processors
An increasing number of embedded system solutions in space, military, and consumer electronics applications rely on processor cores inside reconfigurable logic devices. Ensuring da...
Austin Rogers, Aleksandar Milenkovic