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ETS
2006
IEEE
106views Hardware» more  ETS 2006»
15 years 3 months ago
"Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC
In this paper, complex mixed signal circuits such as SiP or SOC including several ADCs and DACs are considered. A new DFT technique is proposed allowing the test of this complete ...
Vincent Kerzerho, Philippe Cauvet, Serge Bernard, ...
ETS
2006
IEEE
89views Hardware» more  ETS 2006»
15 years 1 months ago
On-Chip Time Measurement Architecture with Femtosecond Timing Resolution
This paper presents a new on-chip time measurement architecture which is based on the Timeto-Digital Conversion (TDC) method that is capable of achieving a timing resolution of te...
Matthew Collins, Bashir M. Al-Hashimi
ETS
2006
IEEE
113views Hardware» more  ETS 2006»
15 years 3 months ago
Wrapper Design for the Reuse of Networks-on-Chip as Test Access Mechanism
This paper proposes a wrapper design for interconnects with guaranteed bandwidth and latency services and on-chip protocol. strate that these interconnects abstract the interconne...
Alexandre M. Amory, Kees Goossens, Erik Jan Marini...
ACL
2008
14 years 11 months ago
Machine Translation System Combination using ITG-based Alignments
Given several systems' automatic translations of the same sentence, we show how to combine them into a confusion network, whose various paths represent composite translations...
Damianos Karakos, Jason Eisner, Sanjeev Khudanpur,...
JMIV
2006
72views more  JMIV 2006»
14 years 9 months ago
A Unifying and Rigorous Shape from Shading Method Adapted to Realistic Data and Applications
We propose a new method for the Lambertian Shape From Shading (SFS) problem based on the notion of Crandall-Lions viscosity solution. This method has the advantage of requiring the...
Emmanuel Prados, Fabio Camilli, Olivier D. Faugera...