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EURODAC
1994
IEEE
115views VHDL» more  EURODAC 1994»
15 years 1 months ago
A method for partitioning UNITY language in hardware and software
In this paper we introduce a method to partition UNITY system speci cations into software and hardware parts. This method considers di erent design possibilities and de nes cost f...
Xun Xiong, Edna Barros, Wolfgang Rosenstiel
EURODAC
1994
IEEE
117views VHDL» more  EURODAC 1994»
15 years 1 months ago
Parallel algorithms for the simulation of lossy transmission lines
The simulation of lossy transmission lines in the time domain is a very time consuming task. It requires numerical convolutions and the solution of linear and nonlinear equation s...
W. Rissiek, O. Rethmeier, H. Holzheuer
EURODAC
1994
IEEE
124views VHDL» more  EURODAC 1994»
15 years 1 months ago
Automotive databus simulation using VHDL
developed and standardised, for example CAN[1][2], J1850[3]. THE ELECTRONIC VEHICLE TODAYVHDL has been used to develop a simulator for automotive databus networks. This is a design...
Karen Hale
EURODAC
1994
IEEE
113views VHDL» more  EURODAC 1994»
15 years 1 months ago
Formal verification of pipeline conflicts in RISC processors
We outline a general methodology for the formal verification of pipeline conflicts in RISC cores. The different kinds of conflicts that can occur due to the simultaneous execution...
Ramayya Kumar, Sofiène Tahar
EURODAC
1994
IEEE
120views VHDL» more  EURODAC 1994»
15 years 1 months ago
Generating compilers for generated datapaths
Modern CAD systems allow the designers to come up with powerful programmable datapaths in avery short time. The time to develop compilers for this datapaths is much longer. This p...
Michael Held, Manfred Glesner