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FMCAD
2008
Springer
14 years 11 months ago
Augmenting a Regular Expression-Based Temporal Logic with Local Variables
The semantics of temporal logic is usually defined with respect to a word representing a computation path over a set of atomic propositions. A temporal logic formula does not contr...
Cindy Eisner, Dana Fisman
FMCAD
2004
Springer
15 years 3 months ago
Non-miter-based Combinational Equivalence Checking by Comparing BDDs with Different Variable Orders
This paper describes a new method that is useful in combinational equivalence checking with very challenging industrial designs. The method does not build a miter; instead it build...
In-Ho Moon, Carl Pixley
FMCAD
2004
Springer
15 years 3 months ago
Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States
Most symbolic model checkers are based on either Binary Decision Diagrams (BDDs), which may grow exponentially large, or Satisfiability (SAT) solvers, whose time requirements rapi...
Mohammad Awedh, Fabio Somenzi
FMCAD
2004
Springer
15 years 1 months ago
A Simple Method for Parameterized Verification of Cache Coherence Protocols
Abstract. We present a simple method for verifying the safety properties of cache coherence protocols with arbitrarily many nodes. Our presentation begins with two examples. The fi...
Ching-Tsun Chou, Phanindra K. Mannava, Seungjoon P...
FMCAD
2004
Springer
15 years 1 months ago
Bloom Filters in Probabilistic Verification
Abstract. Probabilistic techniques for verification of finite-state transition systems offer huge memory savings over deterministic techniques. The two leading probabilistic scheme...
Peter C. Dillinger, Panagiotis Manolios