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FMCAD
2007
Springer
14 years 12 days ago
Verifying Correctness of Transactional Memories
—We show how to verify the correctness of transactional memory implementations with a model checker. We show how to specify transactional memory in terms of the admissible interc...
Ariel Cohen 0002, John W. O'Leary, Amir Pnueli, Ma...
FMCAD
2007
Springer
13 years 10 months ago
Combining Symbolic Simulation and Interval Arithmetic for the Verification of AMS Designs
Abstract--Analog and mixed signal (AMS) designs are important integrated circuits that are usually needed at the interface between the electronic system and the real world. Recentl...
Mohamed H. Zaki, Ghiath Al Sammane, Sofiène...
FMCAD
2007
Springer
14 years 12 days ago
Modeling Time-Triggered Protocols and Verifying Their Real-Time Schedules
Time-triggered systems are distributed systems in which the nodes are independently-clocked but maintain synchrony with one another. Time-triggered protocols depend on the synchro...
Lee Pike
FMCAD
2007
Springer
13 years 10 months ago
Circuit Level Verification of a High-Speed Toggle
As VLSI fabrication technology progresses to 65nm feature sizes and smaller, transistors no longer operate as ideal switches. This motivates verifying digital circuits using contin...
Chao Yan, Mark R. Greenstreet
FMCAD
2007
Springer
14 years 12 days ago
Formal Verification of Partial Good Self-Test Fencing Structures
— The concept of applying partial fencing to logic built-in self test (LBIST) hardware structures for the purpose of using partially good chips is well known in the chip design i...
Adrian E. Seigler, Gary A. Van Huben, Hari Mony