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FCCM
2003
IEEE
148views VLSI» more  FCCM 2003»
15 years 2 months ago
A Hardware Gaussian Noise Generator for Channel Code Evaluation
Hardware simulation of channel codes offers the potential of improving code evaluation speed by orders of magnitude over workstation- or PC-based simulation. We describe a hardwar...
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y...
ASAP
2003
IEEE
153views Hardware» more  ASAP 2003»
15 years 2 months ago
Hardware Synthesis for Multi-Dimensional Time
This paper introduces basic principles for extending the classical systolic synthesis methodology to multi-dimensional time. Multi-dimensional scheduling enables complex algorithm...
Anne-Claire Guillou, Patrice Quinton, Tanguy Risse...
IPPS
2003
IEEE
15 years 2 months ago
Fast Online Task Placement on FPGAs: Free Space Partitioning and 2D-Hashing
Partial reconfiguration allows for mapping and executing several tasks on an FPGA during runtime. Multitasking on FPGAs raises a number of questions on the management of the reco...
Herbert Walder, Christoph Steiger, Marco Platzner
IPPS
2003
IEEE
15 years 2 months ago
Parallel Direct Solution of Linear Equations on FPGA-Based Machines
The efficient solution of large systems of linear equations represented by sparse matrices appears in many tasks. LU factorization followed by backward and forward substitutions i...
Xiaofang Wang, Sotirios G. Ziavras
ISCAS
2003
IEEE
126views Hardware» more  ISCAS 2003»
15 years 2 months ago
High-speed processor for quantum-computing emulation and its applications
A high-speed and large-scale processor dedicated to quantum computing is proposed, which has the minimum operation function needed for execution of a quantum algorithm. In this pr...
Minoru Fujishima, Kaoru Saito, M. Onouchi, Koichir...