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FPL
2004
Springer
87views Hardware» more  FPL 2004»
15 years 1 months ago
A Dynamic NoC Approach for Communication in Reconfigurable Devices
A concept for solving the communication problem among modules dynamically placed on a reconfigurable device is presented. Based on a dynamic network-on-chip (DyNoC) communication i...
Christophe Bobda, Mateusz Majer, Dirk Koch, Ali Ah...
CF
2004
ACM
15 years 3 months ago
Designing and testing fault-tolerant techniques for SRAM-based FPGAs
This paper discusses fault-tolerant techniques for SRAM-based FPGAs. These techniques can be based on circuit level modifications, with obvious modifications in the programmable a...
Fernanda Lima Kastensmidt, Gustavo Neuberger, Luig...
CEE
2004
205views more  CEE 2004»
14 years 9 months ago
64-bit Block ciphers: hardware implementations and comparison analysis
A performance comparison for the 64-bit block cipher (Triple-DES, IDEA, CAST-128, MISTY1, and KHAZAD) FPGA hardware implementations is given in this paper. All these ciphers are u...
Paris Kitsos, Nicolas Sklavos, Michalis D. Galanis...
ASPDAC
2004
ACM
96views Hardware» more  ASPDAC 2004»
15 years 3 months ago
Register binding and port assignment for multiplexer optimization
- Data path connection elements, such as multiplexers, consume a significant amount of area on a VLSI chip, especially for FPGA designs. Multiplexer optimization is a difficult pro...
Deming Chen, Jason Cong
FPL
2004
Springer
205views Hardware» more  FPL 2004»
15 years 3 months ago
A System Level Resource Estimation Tool for FPGAs
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
Changchun Shi, James Hwang, Scott McMillan, Ann Ro...