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CAI
2004
Springer
14 years 9 months ago
An Evolvable Combinational Unit for FPGAs
A complete hardware implementation of an evolvable combinational unit for FPGAs is presented. The proposed combinational unit consisting of a virtual reconfigurable circuit and evo...
Lukás Sekanina, Stepan Friedl
FPL
2004
Springer
171views Hardware» more  FPL 2004»
15 years 3 months ago
A Modular System for FPGA-Based TCP Flow Processing in High-Speed Networks
Field Programmable Gate Arrays (FPGAs) can be used in Intrusion Prevention Systems (IPS) to inspect application data contained within network flows. An IPS operating on high-speed...
David V. Schuehler, John W. Lockwood
FPL
2004
Springer
110views Hardware» more  FPL 2004»
15 years 3 months ago
Versatile Imaging Architecture Based on a System on Chip
Abstract. In this paper, a novel architecture dedicated to image processing is presented. The most original aspect of the approach is the use of a System On Chip implemented in a F...
Pierre Chalimbaud, François Berry
ASAP
2004
IEEE
127views Hardware» more  ASAP 2004»
15 years 1 months ago
A Public-Key Cryptographic Processor for RSA and ECC
We describe a general-purpose processor architecture for accelerating public-key computations on server systems that demand high performance and flexibility to accommodate large n...
Hans Eberle, Nils Gura, Sheueling Chang Shantz, Vi...
FPL
2004
Springer
100views Hardware» more  FPL 2004»
15 years 1 months ago
On Optimal Irregular Switch Box Designs
In this paper, we develop a unified theory in analyzing optimal switch box design problems, particularly for the unsolved irregular cases, where different pin counts are allowed on...
Hongbing Fan, Yu-Liang Wu, Chak-Chung Cheung, Jipi...