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FPGA
2004
ACM
133views FPGA» more  FPGA 2004»
15 years 3 months ago
FPGAs vs. CPUs: trends in peak floating-point performance
Moore’s Law states that the number of transistors on a device doubles every two years; however, it is often (mis)quoted based on its impact on CPU performance. This important co...
Keith D. Underwood
FPGA
2004
ACM
145views FPGA» more  FPGA 2004»
15 years 3 months ago
Exploration of pipelined FPGA interconnect structures
In this work, we parameterize and explore the interconnect structure of pipelined FPGAs. Specifically, we explore the effects of interconnect register population, length of regist...
Akshay Sharma, Katherine Compton, Carl Ebeling, Sc...
FPGA
2004
ACM
180views FPGA» more  FPGA 2004»
15 years 3 months ago
A VHDL MPEG-7 shape descriptor extractor
Unlike its predecessors, MPEG-7 standardizes multimedia metadata description. By providing robust descriptors and an effective system for storing them, MPEG-7 is designed to provi...
Bret Woz, Andreas E. Savakis
FPGA
2004
ACM
121views FPGA» more  FPGA 2004»
15 years 3 months ago
Highly pipelined asynchronous FPGAs
We present the design of a high-performance, highly pipelined asynchronous FPGA. We describe a very fine-grain pipelined logic block and routing interconnect architecture, and sh...
John Teifel, Rajit Manohar
FPGA
2004
ACM
128views FPGA» more  FPGA 2004»
15 years 1 months ago
Incremental physical resynthesis for timing optimization
This paper presents a new approach to timing optimization for FPGA designs, namely incremental physical resynthesis, to answer the challenge of effectively integrating logic and p...
Peter Suaris, Lung-Tien Liu, Yuzheng Ding, Nan-Chi...