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CHES
2007
Springer
136views Cryptology» more  CHES 2007»
15 years 4 months ago
CAIRN 2: An FPGA Implementation of the Sieving Step in the Number Field Sieve Method
The hardness of the integer factorization problem assures the security of some public-key cryptosystems including RSA, and the number field sieve method (NFS), the most efficient ...
Tetsuya Izu, Jun Kogure, Takeshi Shimoyama
92
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BMCBI
2007
233views more  BMCBI 2007»
14 years 10 months ago
160-fold acceleration of the Smith-Waterman algorithm using a field programmable gate array (FPGA)
Background: To infer homology and subsequently gene function, the Smith-Waterman (SW) algorithm is used to find the optimal local alignment between two sequences. When searching s...
Isaac T. S. Li, Warren Shum, Kevin Truong
JSA
2007
142views more  JSA 2007»
14 years 10 months ago
Efficient FPGA hardware development: A multi-language approach
This paper presents a multi-language framework to FPGA hardware development which aims to satisfy the dual requirement of high level hardware design and efficient hardware impleme...
Khaled Benkrid, Abdsamad Benkrid, S. Belkacemi
SAMOS
2007
Springer
15 years 4 months ago
FPGA Design Methodology for a Wavelet-Based Scalable Video Decoder
Client-side diversification led the video-coding community to develop scalable video-codecs supporting efficient decoding at varying quality levels. This scalability has a lot of...
Hendrik Eeckhaut, Harald Devos, Philippe Faes, Mar...
SAMOS
2007
Springer
15 years 4 months ago
Evaluating Large System-on-Chip on Multi-FPGA Platform
This paper presents a configurable base architecture tailorable for different applications. It allows simple and rapid way to evaluate and prototype large Multi-Processor System-on...
Ari Kulmala, Erno Salminen, Timo D. Hämä...