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FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
15 years 4 months ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
FPGA
2007
ACM
122views FPGA» more  FPGA 2007»
15 years 4 months ago
The shunt: an FPGA-based accelerator for network intrusion prevention
Today’s network intrusion prevention systems (IPSs) must perform increasingly sophisticated analysis—parsing protocols and interpreting application dialogs rather than simply ...
Nicholas Weaver, Vern Paxson, José M. Gonz&...
DAGSTUHL
2007
14 years 12 months ago
Parallelism through Digital Circuit Design
Abstract. Two ways to exploit chips with a very large number of transistors are multicore processors and programmable logic chips. Some data parallel algorithms can be executed eï¬...
John O'Donnell
FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
15 years 4 months ago
A practical FPGA-based framework for novel CMP research
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy T...
ERSA
2006
109views Hardware» more  ERSA 2006»
14 years 12 months ago
Synthesis of Object Oriented Models on Reconfigurable Hardware
Abstract-- In this work the problem of modeling reconfigurable systems behavior with a precise, executable semantics is considered. The possibility of synthesising such models onto...
Giovanni Agosta, Francesco Bruschi, Marco D. Santa...