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ASPDAC
2007
ACM
99views Hardware» more  ASPDAC 2007»
15 years 2 months ago
DpRouter: A Fast and Accurate Dynamic-Pattern-Based Global Routing Algorithm
Abstract - This paper presents a fast and accurate global routing algorithm, DpRouter, based on two efficient techniques: (1) dynamic pattern routing (Dpr), and (2) segment movemen...
Zhen Cao, Tong Jing, Jinjun Xiong, Yu Hu, Lei He, ...
ASAP
2007
IEEE
104views Hardware» more  ASAP 2007»
15 years 8 days ago
Hardware Acceleration for 3-D Radiation Dose Calculation
Abstract— The problem of calculating accurate dose distributions lies in the heart of modern radiation therapy for cancer treatment. Software implementations of dose calculation ...
Bo Zhou, Xiaobo Sharon Hu, Danny Z. Chen, Cedric X...
DATE
2007
IEEE
112views Hardware» more  DATE 2007»
15 years 4 months ago
Compact hardware design of Whirlpool hashing core
Weaknesses have recently been found in the widely used cryptographic hash functions SHA-1 and MD5. A potential alternative for these algorithms is the Whirlpool hash function, whi...
Timo Alho, Panu Hämäläinen, Marko H...
AHS
2007
IEEE
349views Hardware» more  AHS 2007»
15 years 4 months ago
A Low Power Implementation of H.264 Adaptive Deblocking Filter Algorithm
In this paper, we present a low power implementation of H.264 adaptive deblocking filter (DBF) algorithm on ARM Versatile / PB926EJ-S Development Board. The DBF hardware is implem...
Mustafa Parlak, Ilker Hamzaoglu
DATE
2007
IEEE
107views Hardware» more  DATE 2007»
15 years 4 months ago
Development of an ASIP enabling flows in ethernet access using a retargetable compilation flow
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node using a retargetable com...
K. Van Renterghem, P. Demuytere, Dieter Verhulst, ...