261 search results - page 44 / 53 » fpga 2007 |
DCC
2007
IEEE
15 years 10 months ago
2007
IEEE
In this contribution, we derive a novel parallel formulation of the standard Itoh-Tsujii algorithm for multiplicative inverse computation over GF(2m). The main building blocks use...
ICCD
2007
IEEE
15 years 7 months ago
2007
IEEE
In single processor architectures, computationallyintensive functions are typically accelerated using hardware accelerators, which exploit the concurrency in the function code to ...
ASAP
2007
IEEE
15 years 4 months ago
2007
IEEE
Currently, television sets with flat plasma and LCD screens with improved resolutions and better color quality are emerging. To fully utilize their capabilities, lower resolution...
ASAP
2007
IEEE
15 years 4 months ago
2007
IEEE
We present a memory efficient, practical, systolic, parallel architecture for the complete 0/1 knapsack dynamic programming problem, including backtracking. This problem was inte...
CODES
2007
IEEE
15 years 4 months ago
2007
IEEE
In this paper, we present the Daedalus framework, which allows for traversing the path from sequential application specification to a working MP-SoC prototype in FPGA technology ...