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76
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CODES
2007
IEEE
15 years 4 months ago
Secure FPGA circuits using controlled placement and routing
In current Field-Programmable-Logic Architecture (FPGA) design flows, it is very hard to control the routing of submodules. It is thus very hard to make an identical copy of an ex...
Pengyuan Yu, Patrick Schaumont
ASAP
2007
IEEE
123views Hardware» more  ASAP 2007»
15 years 1 days ago
Estimating Area Costs of Custom Instructions for FPGA-based Reconfigurable Processors
FPGA (Field Programmable Gate Array) based reconfigurable processor has been shown to meet the increasingly challenging performance targets and shorter time-to-market pressures. I...
Siew Kei Lam, Thambipillai Srikanthan
63
Voted
FPL
2008
Springer
119views Hardware» more  FPL 2008»
14 years 11 months ago
An FPGA-based high-speed, low-latency trigger processor for high-energy physics
An example of an FPGA based application for a high-energy physics experiment is presented which features all facets of modern FPGA design. The special requirements here are high b...
Jan de Cuveland, Felix Rettig, Venelin Angelov, Vo...
76
Voted
FPL
2007
Springer
125views Hardware» more  FPL 2007»
15 years 4 months ago
Run-time Partial Reconfiguration for Removal, Placement and Routing on the Virtex-II-Pro
Reconfigurable computing entails the utilization of a generalpurpose processor augmented with a reconfigurable hardware structure (usually an FPGA). Normally, a complete recon...
Stefan Raaijmakers, Stephan Wong
76
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CDES
2006
87views Hardware» more  CDES 2006»
14 years 11 months ago
A Configuration Concept for a Massively Parallel FPGA Architecture
Sandeep Kumar, Christof Paar, Jan Pelzl, Gerd Pfei...