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    DAC
    2007
    ACM
    96views Computer Architecture» more  DAC 2007»
    Using Negative Edge Triggered FFs to Reduce Glitching Power in FPGA Circuits
    15 years 11 months ago
    Using Negative Edge Triggered FFs to Reduce Glitching Power in FPGA Circuits
    Download  www.eecg.toronto.edu
    Tomasz S. Czajkowski, Stephen Dean Brown
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    MEMOCODE
    2007
    IEEE
    115views Formal Methods» more  MEMOCODE 2007»
    Hardware Acceleration of Matrix Multiplication on a Xilinx FPGA
    15 years 4 months ago
    Hardware Acceleration of Matrix Multiplication on a Xilinx FPGA
    Download  csg.csail.mit.edu
    Nirav Dave, Kermin Fleming, Myron King, Michael Pe...
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    FCCM
    2007
    IEEE
    168views VLSI» more  FCCM 2007»
    Discrete-Time Cellular Neural Networks in FPGA
    14 years 10 months ago
    Discrete-Time Cellular Neural Networks in FPGA
    Download  repositorio.bib.upct.es
    This paper describes a novel architecture for the hardware implementation of non-linear multi-layer cellular neural networks. This makes it feasible to design CNNs with millions o...
    J. Javier Martínez-Álvarez, F. Javie...
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    ISCAS
    2007
    IEEE
    111views Hardware» more  ISCAS 2007»
    Using FPGA for visuo-motor control with a silicon retina and a humanoid robot
    15 years 4 months ago
    Using FPGA for visuo-motor control with a silicon retina and a humanoid robot
    Download  www.ini.uzh.ch
    Alejandro Linares-Barranco, Francisco Gomez-Rodrig...
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    FPL
    2007
    Springer
    171views Hardware» more  FPL 2007»
    A Banded Smith-Waterman FPGA Accelerator for Mercury BLASTP
    15 years 4 months ago
    A Banded Smith-Waterman FPGA Accelerator for Mercury BLASTP
    Download  www.ccrc.wustl.edu
    Brandon Harris, Arpith C. Jacob, Joseph M. Lancast...
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