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DELTA
2008
IEEE
15 years 3 months ago
FPGA implementation of a Single Pass Connected Components Algorithm
The classic connected components labelling algorithm requires two passes through an image. This paper presents an algorithm that allows the connected components to be analysed in ...
Christopher T. Johnston, Donald G. Bailey
ISIP
2008
IEEE
15 years 3 months ago
FPGA Implementation of an Adaptive Noise Canceller
This paper proposes an FPGA implementation of an Adaptive Noise Canceller using the Least Mean Square (LMS) algorithm. The hardware architecture is synthesized using the Xilinx Sp...
Tian Lan, Jinlin Zhang
DATE
2008
IEEE
130views Hardware» more  DATE 2008»
14 years 11 months ago
A Dual-Priority Real-Time Multiprocessor System on FPGA for Automotive Applications
This paper presents the implementation of a dualpriority scheduling algorithm for real-time embedded systems on a shared memory multiprocessor on FPGA. The dual-priority microkern...
Antonino Tumeo, Marco Branca, Lorenzo Camerini, Ma...
CSREAESA
2008
14 years 11 months ago
BIST-BASED Group Testing for Diagnosis of Embedded FPGA Cores
A group testing-based BIST technique to identify faulty hard cores in FPGA devices is presented. The method provides for isolation of faults in embedded cores as demonstrated by ex...
Alireza Sarvi, Carthik A. Sharma, Ronald F. DeMara
BMCBI
2008
214views more  BMCBI 2008»
14 years 9 months ago
Accelerating String Set Matching in FPGA Hardware for Bioinformatics Research
Background: This paper describes techniques for accelerating the performance of the string set matching problem with particular emphasis on applications in computational proteomic...
Yoginder S. Dandass, Shane C. Burgess, Mark Lawren...