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FCCM
2008
IEEE
133views VLSI» more  FCCM 2008»
14 years 11 months ago
Runtime Filesystem Support for Reconfigurable FPGA Hardware Processes in BORPH
This paper presents the design of BORPH's file system layer for FPGA-based reconfigurable computers. BORPH provides user FPGA designs that execute as hardware processes acces...
Hayden Kwok-Hay So, Robert W. Brodersen
DATE
2008
IEEE
140views Hardware» more  DATE 2008»
15 years 3 months ago
FPGA Design for Algebraic Tori-Based Public-Key Cryptography
Algebraic torus-based cryptosystems are an alternative for Public-Key Cryptography (PKC). It maintains the security of a larger group while the actual computations are performed i...
Junfeng Fan, Lejla Batina, Kazuo Sakiyama, Ingrid ...
ISVLSI
2008
IEEE
156views VLSI» more  ISVLSI 2008»
15 years 3 months ago
Characterisation of FPGA Clock Variability
As integrated circuits are scaled down it becomes difficult to maintain uniformity in process parameters across each individual die. The resulting performance variation requires ...
N. Pete Sedcole, Justin S. Wong, Peter Y. K. Cheun...
FPL
2008
Springer
124views Hardware» more  FPL 2008»
14 years 11 months ago
Direct sigma-delta modulated signal processing in FPGA
The effectiveness of implementing bit-stream signal processing (BSSP) multiplier circuits in FPGAs, in terms of hardware resources and clock frequency, is presented. In particular...
Chiu-Wah Ng, Ngai Wong, Hayden Kwok-Hay So, Tung-S...
FPL
2008
Springer
104views Hardware» more  FPL 2008»
14 years 11 months ago
A technique for minimizing power during FPGA placement
This paper considers the implementation of an annealing technique for dynamic power reduction in FPGAs. The proposed method comprises a power-aware objective function for placemen...
Kristofer Vorwerk, Madhu Raman, Julien Dunoyer, Ya...