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107
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ARC
2008
Springer
175views Hardware» more  ARC 2008»
14 years 11 months ago
Multivariate Gaussian Random Number Generator Targeting Specific Resource Utilization in an FPGA
Abstract. Financial applications are one of many fields where a multivariate Gaussian random number generator plays a key role in performing computationally extensive simulations. ...
Chalermpol Saiprasert, Christos-Savvas Bouganis, G...
DSD
2008
IEEE
115views Hardware» more  DSD 2008»
15 years 3 months ago
An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA
We propose a method to efficiently design a “parity generator”, which is a stand-alone block producing multiple parity bits of a given circuit. The parity generator is designe...
Petr Fiser, Pavel Kubalík, Hana Kubatova
FCCM
2008
IEEE
153views VLSI» more  FCCM 2008»
15 years 3 months ago
A SRAM-based Architecture for Trie-based IP Lookup Using FPGA
Internet Protocol (IP) lookup in routers can be implemented by some form of tree traversal. Pipelining can dramatically improve the search throughput. However, it results in unbal...
Hoang Le, Weirong Jiang, Viktor K. Prasanna
79
Voted
FDL
2008
IEEE
15 years 3 months ago
Towards Compilation of Streaming Programs into FPGA Hardware
There is an increasing need for automated conversion of high-level design descriptions into hardware. We present a flow that converts a software application written in the Brook ...
Franjo Plavec, Zvonko G. Vranesic, Stephen Dean Br...
104
Voted
ASAP
2008
IEEE
119views Hardware» more  ASAP 2008»
14 years 11 months ago
An FPGA architecture for CABAC decoding in manycore systems
Arithmetic coding is an efficient entropy compression method that achieves results close to the entropy limit and it is used in modern standards such as JPEG-2000 and H.264. Arith...
Roberto R. Osorio, Javier D. Bruguera