259 search results - page 31 / 52 » fpga 2008 |
INTEGRATION
2008
14 years 8 months ago
2008
This paper presents a Viterbi Decoder (VD) architecture for a programmable data transmission system, implemented using a Field Programmable Gate Array (FPGA) device. This VD has b...
VLSISP
2008
14 years 8 months ago
2008
In this paper, we introduce a new method for watermarking of IP cores for FPGA architectures where the signature (watermark) is detected at the power supply pins of the FPGA. This ...
TPDS
2010
14 years 7 months ago
2010
—This paper presents the development and implementation of a multiprocessor system-on-chip solution for fast and real time simulations of complex and nonlinear wheel-rail contact...
DELTA
2008
IEEE
15 years 4 months ago
2008
IEEE
Scheduling of concurrent processors in a real-time image processing system on FPGA (Field programmable gate array) hardware is a not a trivial task. We propose a number of graphic...
WCE
2007
14 years 10 months ago
2007
Abstract— Common MRI sampling patterns in kspace, such as spiral trajectories, have nonuniform density and do not lie on a rectangular grid. We propose mapping the sampled data t...