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ICONS
2008
IEEE
15 years 3 months ago
An Efficient Hardware Implementation of the Tate Pairing in Characteristic Three
DL systems with bilinear structure recently became an important base for cryptographic protocols such as identity-based encryption (IBE). Since the main computational task is the ...
Giray Kömürcü, Erkay Savas
ICPP
2008
IEEE
15 years 3 months ago
VELO: A Novel Communication Engine for Ultra-Low Latency Message Transfers
This paper presents a novel stateless, virtualized communication engine for sub-microsecond latency. Using a Field-Programmable-Gate-Array (FPGA) based prototype we show a latency...
Heiner Litz, Holger Fröning, Mondrian Nü...
VTC
2008
IEEE
129views Communications» more  VTC 2008»
15 years 3 months ago
On Parallelizing the CryptMT Stream Cipher
Abstract—Fast stream ciphers are used extensively for encrypted data transmission in mobile networks and over multigigabit links. CryptMT, a recently proposed stream cipher, is o...
Deian Stefan, David B. Nummey, Jared Harwayne-Gida...
ARC
2008
Springer
186views Hardware» more  ARC 2008»
14 years 11 months ago
FPGA-based Real-time Super-Resolution on an Adaptive Image Sensor
Recent technological advances in imaging industry have lead to the production of imaging systems with high density pixel sensors. However, their long exposure times limit their app...
Maria E. Angelopoulou, Christos-Savvas Bouganis, P...
CASES
2008
ACM
14 years 11 months ago
VESPA: portable, scalable, and flexible FPGA-based vector processors
While soft processors are increasingly common in FPGAbased embedded systems, it remains a challenge to scale their performance. We propose extending soft processor instruction set...
Peter Yiannacouras, J. Gregory Steffan, Jonathan R...