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DSD
2008
IEEE
95views Hardware» more  DSD 2008»
15 years 3 months ago
Programmable Numerical Function Generators for Two-Variable Functions
This paper proposes a design method and programmable architectures for numerical function generators (NFGs) of two-variable functions. To realize a two-variable function in hardwa...
Shinobu Nagayama, Jon T. Butler, Tsutomu Sasao
ETFA
2008
IEEE
15 years 3 months ago
Two camera system for robot applications; navigation
Current approaches to feature detection and matching in images strive to increase the repeatability of the detector and minimize the degree of outliers in the matching. In this pa...
Jörgen Lidholm, Fredrik Ekstrand, Lars Asplun...
ISCAS
2008
IEEE
127views Hardware» more  ISCAS 2008»
15 years 3 months ago
Compact ASIC implementation of the ICEBERG block cipher with concurrent error detection
— ICEBERG is a block cipher that has been recently proposed for security applications requiring efficient FPGA implementations. In this paper, we investigate a compact ASIC imple...
Huiju Cheng, Howard M. Heys
ISCAS
2008
IEEE
118views Hardware» more  ISCAS 2008»
15 years 3 months ago
Algorithm for parallel inverse halftoning using partitioning of Look-Up Table (LUT)
— The Look-Up Table (LUT) method for inverse halftoning is fast and computation-free technique employed to obtain good quality images. In this work we propose a new algorithm to ...
Umair F. Siddiqi, Sadiq M. Sait
AFRICACRYPT
2008
Springer
15 years 3 months ago
Implementation of the AES-128 on Virtex-5 FPGAs
Abstract. This paper presents an updated implementation of the Advanced Encryption Standard (AES) on the recent Xilinx Virtex-5 FPGAs. We show how a modified slice structure in th...
Philippe Bulens, François-Xavier Standaert,...