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FPL
2008
Springer
180views Hardware» more  FPL 2008»
14 years 11 months ago
Compiled hardware acceleration of Molecular Dynamics code
The objective of Molecular Dynamics (MD) simulations is to determine the shape of a molecule in a given biomolecular environment. These simulations are very demanding computationa...
Jason R. Villarreal, Walid A. Najjar
FPL
2008
Springer
109views Hardware» more  FPL 2008»
14 years 11 months ago
Loop unrolling and shifting for reconfigurable architectures
Loops are an important source of optimization. In this paper, we propose an extension to our work on loop unrolling and loop shifting for reconfigurable architectures. By applying...
Ozana Silvia Dragomir, Todor Stefanov, Koen Bertel...
FPL
2008
Springer
119views Hardware» more  FPL 2008»
14 years 11 months ago
Polymorphic wavelet architectures using reconfigurable hardware
Traditional microprocessor-based solutions are insufficient to serve the dynamic throughput demands of real-time scalable multimedia processing systems. This paper introduces a Po...
Amit Pande, Joseph Zambreno
FPL
2008
Springer
126views Hardware» more  FPL 2008»
14 years 11 months ago
Customized Reconfigurable Interconnection Networks for multiple application SOCS
A Customized Reconfigurable Interconnection Network (CRIN) refers to a minimal switching network, yielding routing solutions for any element in a pre-given set of routing requirem...
Hongbing Fan, Jason Ernst, Yu-Liang Wu
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FPL
2008
Springer
120views Hardware» more  FPL 2008»
14 years 11 months ago
An FPGA-based implementation of the MINRES algorithm
Due to continuous improvements in the resources available on FPGAs, it is becoming increasingly possible to accelerate floating point algorithms. The solution of a system of linea...
David Boland, George A. Constantinides