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FPL
2006
Springer
129views Hardware» more  FPL 2006»
15 years 1 months ago
A Reconfigurable Viterbi Decoder for a Communication Platform
A new large constraint length, soft decision viterbi decoder fabric is presented for deployment using platform based system on chip methodologies. The decoder can be reconfigured ...
Imran Ahmed, Tughrul Arslan
FPL
2006
Springer
158views Hardware» more  FPL 2006»
15 years 1 months ago
Placing Functionality in Fault-Tolerant Hardware/Software Reconfigurable Networks
A novel framework shows the potential of FPGA-based systems for increasing fault-tolerance and flexibility by placing functionality onto free hardware (HW) or software (SW) resour...
Thilo Streichert
FPL
2006
Springer
85views Hardware» more  FPL 2006»
15 years 1 months ago
High-Performance and Parameterized Matrix Factorization on FPGAs
FPGAs have become an attractive choice for scientific computing. In this paper, we propose a high performance design for LU decomposition, a key kernel in many scientific and engi...
Ling Zhuo, Viktor K. Prasanna
FPL
2006
Springer
99views Hardware» more  FPL 2006»
15 years 1 months ago
Identifying FPGA IP-Cores Based on Lookup Table Content Analysis
In this paper we introduce a new method to identify IP cores in an FPGA by analyzing the content of lookup tables. This techniques can be used to identify registered cores for IP ...
Daniel Ziener, Stefan Assmus, Jürgen Teich
FPL
2006
Springer
111views Hardware» more  FPL 2006»
15 years 1 months ago
A-B Nodes Classification for Power Estimation
In this paper, an optimization for the classical statistical power estimation method is proposed. This technique is applied to the individual nodes. The optimization is based on t...
Elias Todorovich, Eduardo I. Boemo