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32
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glvlsi 2005
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GLVLSI
2005
IEEE
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Digital cell macro-model with regular substrate template and EKV based MOSFET model
13 years 12 months ago
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Yulei Weng, Alex Doboli
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GLVLSI
2005
IEEE
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Dual-transition glitch filtering in probabilistic waveform power estimation
13 years 12 months ago
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www.eng.auburn.edu
Fei Hu, Vishwani D. Agrawal
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GLVLSI
2005
IEEE
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Forward image computation with backtracing ATPG and incremental state-set construction
13 years 12 months ago
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computing.ece.vt.edu
Kameshwar Chandrasekar, Michael S. Hsiao
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GLVLSI
2005
IEEE
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Fine-grain leakage optimization in SRAM based FPGAs
13 years 12 months ago
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www.eecs.northwestern.edu
Somsubhra Mondal, Seda Ogrenci Memik
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GLVLSI
2005
IEEE
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PIM lite: a multithreaded processor-in-memory prototype
13 years 12 months ago
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www.cse.nd.edu
Abstract— PIM Lite is a processor-in-memory prototype implemented in a 0.18 micron logic process. PIM Lite provides a complete working demonstration of a minimal-state, lightweig...
Shyamkumar Thoziyoor, Jay B. Brockman, Daniel Rinz...
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