19 search results - page 2 / 4 » glvlsi 2008 |
GLVLSI
2008
IEEE
14 years 26 days ago
2008
IEEE
This paper presents in-order pulsed charge recycling to reduce energy consumption in an off-chip data bus. The proposed technique performs charge recycling by employing three step...
GLVLSI
2008
IEEE
14 years 26 days ago
2008
IEEE
This paper presents the design and evaluation of a new SRAM cell made of nine transistors (9T). The proposed 9T cell utilizes a scheme with separate read and write wordlines; it i...
GLVLSI
2008
IEEE
13 years 6 months ago
2008
IEEE
This paper presents an improved Tree-based architecture that unifies two unidirectional programmable networks: A predictible downward network based on the Butterfly-FatTree topolo...
GLVLSI
2008
IEEE
14 years 26 days ago
2008
IEEE
Share of leakage in cache memories is increasing with technology scaling. Studies show that most stored bits in instruction caches are zero, and hence, asymmetric SRAM cells which...
GLVLSI
2008
IEEE
14 years 26 days ago
2008
IEEE
Timing optimizations during logic synthesis has become a necessary step to achieve timing closure in VLSI designs. This often involves “shortening” all paths found in the circ...