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GLVLSI
2008
IEEE
183views VLSI» more  GLVLSI 2008»
13 years 7 months ago
An analytical model for the upper bound on temperature differences on a chip
The main contribution of this work is an analytical model for finding the upper bound on the temperature difference among various locations on the die. The proposed model can be u...
Shervin Sharifi, Tajana Simunic Rosing
GLVLSI
2008
IEEE
150views VLSI» more  GLVLSI 2008»
13 years 6 months ago
Using unsatisfiable cores to debug multiple design errors
Due to the increasing complexity of today's circuits a high degree of automation in the design process is mandatory. The detection of faults and design errors is supported qu...
André Sülflow, Görschwin Fey, Rod...
GLVLSI
2008
IEEE
140views VLSI» more  GLVLSI 2008»
14 years 26 days ago
A table-based method for single-pass cache optimization
Due to the large contribution of the memory subsystem to total system power, the memory subsystem is highly amenable to customization for reduced power/energy and/or improved perf...
Pablo Viana, Ann Gordon-Ross, Edna Barros, Frank V...
GLVLSI
2008
IEEE
204views VLSI» more  GLVLSI 2008»
14 years 26 days ago
NBTI resilient circuits using adaptive body biasing
Reliability has become a practical concern in today’s VLSI design with advanced technologies. In-situ sensors have been proposed for reliability monitoring to provide advance wa...
Zhenyu Qi, Mircea R. Stan
GLVLSI
2008
IEEE
120views VLSI» more  GLVLSI 2008»
14 years 26 days ago
SAT-based equivalence checking of threshold logic designs for nanotechnologies
Novel nano-scale devices have shown promising potential to overcome physical barriers faced by complementary metaloxide semiconductor (CMOS) technology in future circuit design. H...
Yexin Zheng, Michael S. Hsiao, Chao Huang