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» iOPEN Network: Operation Mechanisms and Experimental Study
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ISCA
2011
IEEE
386views Hardware» more  ISCA 2011»
14 years 4 months ago
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xi...
CIDR
2009
181views Algorithms» more  CIDR 2009»
15 years 1 months ago
The Case for RodentStore: An Adaptive, Declarative Storage System
Recent excitement in the database community surrounding new applications--analytic, scientific, graph, geospatial, etc.--has led to an explosion in research on database storage sy...
Philippe Cudré-Mauroux, Eugene Wu, Samuel M...
131
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WWW
2008
ACM
16 years 1 months ago
Using graphics processors for high-performance IR query processing
Web search engines are facing formidable performance challenges due to data sizes and query loads. The major engines have to process tens of thousands of queries per second over t...
Shuai Ding, Jinru He, Hao Yan, Torsten Suel
TOMACS
1998
140views more  TOMACS 1998»
15 years 1 days ago
Technical Note: A Hierarchical Computer Architecture Design and Simulation Environment
architectures at multiple levels of abstraction, encompassing both hardware and software. It has five modes of operation (Design, Model Validation, Build Simulation, Simulate Syste...
Paul S. Coe, Fred W. Howell, Roland N. Ibbett, Lau...
NOMS
2010
IEEE
180views Communications» more  NOMS 2010»
14 years 10 months ago
Exploiting non-dedicated resources for cloud computing
—Popular web services and applications such as Google Apps, DropBox, and Go.Pc introduce a wasteful imbalance of processing resources. Each host operated by a provider serves hun...
Artur Andrzejak, Derrick Kondo, David P. Anderson