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ICCAD
1994
IEEE
73views Hardware» more  ICCAD 1994»
15 years 2 months ago
Low power state assignment targeting two-and multi-level logic implementations
Chi-Ying Tsui, Massoud Pedram, Chih-Ang Chen, Alvi...
44
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ICCAD
1994
IEEE
77views Hardware» more  ICCAD 1994»
15 years 2 months ago
A specified delay accomplishing clock router using multiple layers
Mitsuho Seki, Kenji Inoue, Kazuo Kato, Kouki Tsuru...
ICCAD
1994
IEEE
83views Hardware» more  ICCAD 1994»
15 years 2 months ago
A new built-in self-test approach for digital-to-analog and analog-to-digital converters
This paper proposes a test approach and circuitry suitable for built-in self-test (BIST) of digital-to-analog (D/A) and analog-to-digital (A/D) converters. Offset, gain, linearity...
Karim Arabi, Bozena Kaminska, Janusz Rzeszut
ICCAD
1994
IEEE
80views Hardware» more  ICCAD 1994»
15 years 2 months ago
Folding a stack of equal width components
We consider two versions of the problem of folding a stack of equal width components. In both versions, when a stack is folded, a routing penalty is incurred at the fold. In one v...
Venkat Thanvantri, Sartaj K. Sahni
ICCAD
1994
IEEE
87views Hardware» more  ICCAD 1994»
15 years 2 months ago
On testing delay faults in macro-based combinational circuits
We consider the problem of testing for delay faults in macrobased circuits. Macro-based circuits are obtained as a result of technology mapping. Gate-level fault models cannot be ...
Irith Pomeranz, Sudhakar M. Reddy