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ICCAD
1998
IEEE
15 years 6 months ago
1998
IEEE
A method is presented for identifying primitive path-delay faults in non-scan sequential circuits and generating robust tests for all robustly testable primitive faults. It uses t...
112
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ICCAD
1998
IEEE
15 years 6 months ago
1998
IEEE
In traditional distributed embedded system designs, control information is often replicated across several processes and kept coherent by application-specific mechanisms. Conseque...
104
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ICCAD
1998
IEEE
15 years 6 months ago
1998
IEEE
In this paper, we propose a new logic synthesis methodology to deal with the increasing importance of the interconnect delay in deepsubmicron technologies. We first show that conv...
ICCAD
1998
IEEE
15 years 6 months ago
1998
IEEE
We survey the state-of-the-art in real-time operating systems (RTOSs) from the system synthesis point of view. RTOSs have a very long research history which provides important the...
108
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ICCAD
1998
IEEE
15 years 6 months ago
1998
IEEE
Retiming and resynthesis transformations can be used for optimizing the area, power, and delay of sequential circuits. Even though this technique has been known for more than a de...