1 - This paper presents an efficient design exploration environment for high-end core processors. The heart of the proposed design exploration framework is a two-level simulation e...
Tight data- and timing constraints are imposed by communication and multimedia applications. The architecture for the embedded processor imply resource constraints. Instead of ran...
Carlos A. Alba Pinto, Bart Mesman, Jochen A. G. Je...
This paper presents both compact analytical models and fast SPICE based 3-D electro-thermal simulation methodology to characterize thermal effects due to Joule heating in high per...
As system integration evolves and tighter design constraints must be met, it becomes necessary to account for the non-ideal behavior of all the elements in a system. Certain devic...
Carlos P. Coelho, Joel R. Phillips, Luis Miguel Si...
This paper presents the sizing rules method for analog CMOS circuit design that consists of: first, the development of a hierarchical library of transistor pair groups as basic b...
Helmut E. Graeb, Stephan Zizala, Josef Eckmueller,...