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ICCAD
2002
IEEE
145views Hardware» more  ICCAD 2002»
15 years 6 months ago
A local circuit topology for inductive parasitics
A novel circuit topology for inductive coupling between interconnecting wires is presented. The model is local, i.e., only coupling between neighboring wires is explicitly modeled...
Andrea Pacelli
ICCAD
2002
IEEE
163views Hardware» more  ICCAD 2002»
15 years 6 months ago
Sub-90nm technologies: challenges and opportunities for CAD
Future high performance microprocessor design with technology scaling beyond 90nm will pose two major challenges: (1) energy and power, and (2) parameter variations. Design practi...
Tanay Karnik, Shekhar Borkar, Vivek De
ICCAD
2002
IEEE
146views Hardware» more  ICCAD 2002»
15 years 6 months ago
Test-model based hierarchical DFT synthesis
With increasing design sizes and adoption of System on a Chip (SoC) methodology, design synthesis and test automation tools are hitting capacity and performance bottlenecks. Curre...
Sanjay Ramnath, Frederic Neuveux, Mokhtar Hirech, ...
ICCAD
2002
IEEE
80views Hardware» more  ICCAD 2002»
15 years 6 months ago
Minimizing power across multiple technology and design levels
Approaches to achieve low-power and high-speed VLSI's are described with the emphasis on techniques across multiple technology and design levels. To suppress the leakage curr...
Takayasu Sakurai
ICCAD
2002
IEEE
85views Hardware» more  ICCAD 2002»
15 years 2 months ago
On undetectable faults in partial scan circuits
We study the undetectable faults in partial scan circuits under a test application scheme referred to as transparent-scan. The transparent-scan approach allows very aggressive tes...
Irith Pomeranz, Sudhakar M. Reddy