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ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
Static timing analysis is a critical step in design of any digital integrated circuit. Technology and design trends have led to significant increase in environmental and process v...
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ICCAD
2003
IEEE
15 years 2 months ago
2003
IEEE
While performance, area, and power constraints have been the driving force in designing current communication-enabled embedded systems, post-fabrication and run-time adaptability ...
ICCAD
2003
IEEE
15 years 2 months ago
2003
IEEE
This paper proposes for latency insensitive systems a performance optimization technique called channel buffer queue sizing, which is performed after relay station insertion in th...
ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
This paper proposes a scheme that captures diverse input waveforms of CMOS gates for static timing analysis. Conventionally the latest arrival time and transition time are calcula...
ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
– Many embedded system designs usually impose (hard) read-time constraints on tasks. Thus, computing a tight upper bound of the worst case execution time (WCET) of a software is ...