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ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
Traditional RTL power optimization techniques commit transformations at the RTL based on the estimation of area, delay and power. However, because of inadequate power and delay in...
ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
As current silicon-based techniques fast approach their practical limits, the investigation of nanoscale electronics, devices and system architectures becomes a central research p...
ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
In this paper, we present improvements to recursive bisection based placement. In contrast to prior work, our horizontal cut lines are not restricted to row boundaries; this avoid...
ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
Current CMOS technologies are characterized by interconnect lines with increased relative resistance w.r.t. driver output resistance. Designs generate signal waveshapes that are v...
ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
The Y-architecture for on-chip interconnect is based on pervasive use of 0-, 120-, and 240-degree oriented semi-global and global wiring. Its use of three uniform directions explo...