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ICCAD
2005
IEEE
106views Hardware» more  ICCAD 2005»
15 years 3 months ago
Fast balanced stochastic truncation via a quadratic extension of the alternating direction implicit iteration
— Balanced truncation (BT) model order reduction (MOR) is known for its superior accuracy and computable error bounds. Balanced stochastic truncation (BST) is a particular BT pro...
Ngai Wong, Venkataramanan Balakrishnan
ICCAD
2005
IEEE
128views Hardware» more  ICCAD 2005»
15 years 6 months ago
Reducing structural bias in technology mapping
Technology mapping based on DAG-covering suffers from the problem of structural bias: the structure of the mapped netlist depends strongly on the subject graph. In this paper we ...
Satrajit Chatterjee, Alan Mishchenko, Robert K. Br...
ICCAD
2005
IEEE
83views Hardware» more  ICCAD 2005»
15 years 6 months ago
Post-placement rewiring and rebuffering by exhaustive search for functional symmetries
Separate optimizations of logic and layout have been thoroughly studied in the past and are well documented for common benchmarks. However, to be competitive, modern circuit optim...
Kai-Hui Chang, Igor L. Markov, Valeria Bertacco
ICCAD
2005
IEEE
105views Hardware» more  ICCAD 2005»
15 years 6 months ago
Response shaper: a novel technique to enhance unknown tolerance for output response compaction
The presence of unknown values in the simulation result is a key barrier to effective output response compaction in practice. This paper proposes a simple circuit module, called a...
Mango Chia-Tso Chao, Seongmoon Wang, Srimat T. Cha...
ICCAD
2005
IEEE
108views Hardware» more  ICCAD 2005»
15 years 6 months ago
A routing algorithm for flip-chip design
— The flip-chip package gives the highest chip density of any packaging method to support the pad-limited Application-Specific Integrated Circuit (ASIC) designs. In this paper,...
Jia-Wei Fang, I-Jye Lin, Ping-Hung Yuh, Yao-Wen Ch...