Placement migration is a critical step to address a variety of postplacement design closure issues, such as timing, routing congestion, signal integrity, and heat distribution. To...
Tao Luo, Haoxing Ren, Charles J. Alpert, David Zhi...
Networks-on-Chip (NoCs) represent a promising solution to complex on-chip communication problems. The NoC communication architectures considered so far are based on either complete...
— Process variations cause significant timing uncertainty and yield degradation in deep sub-micron technologies. A solution to counter timing uncertainty is post-silicon clock t...
Clock skew is becoming increasingly difficult to control due to variations. Link based non-tree clock distribution is a cost-effective technique for reducing clock skew variation...
State-equivalence based reduction techniques, e.g. bisimulation minimization, can be used to reduce a state transition system to facilitate subsequent verification tasks. However...