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    ICCAD
    2009
    IEEE
    129views Hardware» more  ICCAD 2009»
    A study of Through-Silicon-Via impact on the 3D stacked IC layout
    14 years 10 months ago
    A study of Through-Silicon-Via impact on the 3D stacked IC layout
    Download  www.gtcad.gatech.edu
    Dae Hyun Kim, Krit Athikulwongse, Sung Kyu Lim
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    ICCAD
    2009
    IEEE
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    Joint design-time and post-silicon optimization for digitally tuned analog circuits
    14 years 10 months ago
    Joint design-time and post-silicon optimization for digitally tuned analog circuits
    Download  eda.ee.ucla.edu
    Wei Yao, Yiyu Shi, Lei He, Sudhakar Pamarti
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    ICCAD
    2009
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    IPR: In-Place Reconfiguration for FPGA fault tolerance
    14 years 10 months ago
    IPR: In-Place Reconfiguration for FPGA fault tolerance
    Download  eda.ee.ucla.edu
    Zhe Feng 0002, Yu Hu, Lei He, Rupak Majumdar
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    ICCAD
    2009
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    Synthesizing complementary circuits automatically
    14 years 10 months ago
    Synthesizing complementary circuits automatically
    Download  www.ssypub.org
    ShengYu Shen, Jianmin Zhang, Ying Qin, Sikun Li
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    ICCAD
    2009
    IEEE
    126views Hardware» more  ICCAD 2009»
    Timing Arc based logic analysis for false noise reduction
    14 years 10 months ago
    Timing Arc based logic analysis for false noise reduction
    Download  www.informatik.uni-bremen.de
    The problem of calculating accurate impact of crosstalk on a circuit considering its inherent logic and timing properties is very complex. Although it has been widely studied, it ...
    Murthy Palla, Jens Bargfrede, Stephan Eggersgl&uum...
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