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ICCD
2004
IEEE
172views Hardware» more  ICCD 2004»
15 years 7 months ago
A Signal Integrity Test Bed for PCB Buses
Research in high-speed interconnect requires physical test to validate circuit models and design assumptions. At multi-Gbit/sec rates, physical implementations require custom circ...
Jihong Ren, Mark R. Greenstreet
ICCD
2004
IEEE
106views Hardware» more  ICCD 2004»
15 years 7 months ago
Extending the Applicability of Parallel-Serial Scan Designs
Although scan-based designs are widely used in order to reduce the complexity of test generation, test application time and test data volume are substantially increased. We propos...
Baris Arslan, Ozgur Sinanoglu, Alex Orailoglu
ICCD
2004
IEEE
87views Hardware» more  ICCD 2004»
15 years 7 months ago
Evaluating Techniques for Exploiting Instruction Slack
In many workloads, 25% to 50% of instructions have slack allowing them to be delayed without impacting performance. To exploit this slack, processors may implement more power-efï¬...
Yau Chin, John Sheu, David Brooks
ICCD
2004
IEEE
123views Hardware» more  ICCD 2004»
15 years 7 months ago
Software/Network Co-Simulation of Heterogeneous Industrial Networks Architectures
The work presents a modeling and analysis framework for heterogeneous industrial networks architectures which is based on a tight integration of a network simulator with embedded ...
Franco Fummi, Stefano Martini, Marco Monguzzi, Gio...
ICCD
2004
IEEE
112views Hardware» more  ICCD 2004»
15 years 7 months ago
Combined Channel Segmentation and Buffer Insertion for Routability and Performance Improvement of Field
In this paper, we propose a combined channel segmentation and buffer insertion approach, which minimizes the number of buffers inserted while satisfying the delay constraints for ...
Hu Huang, Joseph B. Bernstein, Martin Peckerar, Ji...