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ICCD
2004
IEEE
137views Hardware» more  ICCD 2004»
15 years 7 months ago
Comparative Study of Strategies for Formal Verification of High-Level Processors
Compared are different methods for evaluation of formulas expressing microprocessor correctness in the logic of Equality with Uninterpreted Functions and Memories (EUFM) by transl...
Miroslav N. Velev
ICCD
2004
IEEE
112views Hardware» more  ICCD 2004»
15 years 7 months ago
Reducing Issue Queue Power for Multimedia Applications using a Feedback Control Algorithm
In this work, we propose a dynamic power-aware issue queue in a general-purpose microprocessor for multimedia applications. Its resources can be adapted at runtime in accordance w...
Yu Bai, R. Iris Bahar
ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
15 years 7 months ago
Simultaneous Scheduling, Binding and Layer Assignment for Synthesis of Vertically Integrated 3D Systems
Three dimensional vertically integrated systems allow active devices to be placed on multiple device layers. In recent years, a number of research efforts have addressed physical ...
Madhubanti Mukherjee, Ranga Vemuri
ICCD
2004
IEEE
115views Hardware» more  ICCD 2004»
15 years 7 months ago
Generating Monitor Circuits for Simulation-Friendly GSTE Assertion Graphs
Formal and dynamic (simulation, emulation, etc.) verification techniques are both needed to deal with the overall challenge of verification. Ideally, the same specification/tes...
Kelvin Ng, Alan J. Hu, Jin Yang
ICCD
2004
IEEE
109views Hardware» more  ICCD 2004»
15 years 7 months ago
Low Power Test Data Compression Based on LFSR Reseeding
Many test data compression schemes are based on LFSR reseeding. A drawback of these schemes is that the unspecified bits are filled with random values resulting in a large number ...
Jinkyu Lee, Nur A. Touba