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ICS
1997
Tsinghua U.
15 years 1 months ago
Eliminating Cache Conflict Misses through XOR-Based Placement Functions
This paper makes the case for the use of XOR-based placement functions for cache memories. It shows that these XOR-mapping schemes can eliminate many conflict misses for direct-ma...
Antonio González, Mateo Valero, Nigel P. To...
DAC
1997
ACM
15 years 1 months ago
Structured Design of Microelectromechanical Systems
In order to efficiently design complex microelectromechanical systems (MEMS) having large numbers of multi-domain components, a hierarchically structured design approach that is ...
Tamal Mukherjee, Gary K. Fedder
76
Voted
WSC
1997
14 years 11 months ago
Efficient Instruction Cache Simulation and Execution Profiling with a Threaded-Code Interpreter
We present an extension to an existing SPARC V8 instruction set simulator, SimICS, to support accurate profiling of branches and instruction cache misses. SimICS had previously su...
Peter S. Magnusson
ICCAD
1997
IEEE
94views Hardware» more  ICCAD 1997»
15 years 1 months ago
High-level scheduling model and control synthesis for a broad range of design applications
This paper presents a versatile scheduling model and an efficient control synthesis methodology which enables architectural (high-level) design/synthesis systems to seamlessly su...
Chih-Tung Chen, Kayhan Küçük&cced...
ICCAD
1997
IEEE
75views Hardware» more  ICCAD 1997»
15 years 1 months ago
An exact gate decomposition algorithm for low-power technology mapping
With the remarkable growth of portable application and the increasing frequency and integration density, power is being given comparable weight to speed and area in IC designs. In...
Hai Zhou, D. F. Wong