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LCTRTS
2005
Springer
15 years 3 months ago
A sample-based cache mapping scheme
Applications running on the StrongARM SA-1110 or XScale processor cores can specify cache mapping for each virtual page to achieve better cache utilization. In this work, we descr...
Rong Xu, Zhiyuan Li
SAT
2005
Springer
138views Hardware» more  SAT 2005»
15 years 3 months ago
On Applying Cutting Planes in DLL-Based Algorithms for Pseudo-Boolean Optimization
The utilization of cutting planes is a key technique in Integer Linear Programming (ILP). However, cutting planes have seldom been applied in Pseudo-Boolean Optimization (PBO) algo...
Vasco M. Manquinho, João P. Marques Silva
ILP
2005
Springer
15 years 3 months ago
Deriving a Stationary Dynamic Bayesian Network from a Logic Program with Recursive Loops
Recursive loops in a logic program present a challenging problem to the PLP framework. On the one hand, they loop forever so that the PLP backward-chaining inferences would never s...
Yi-Dong Shen, Qiang Yang
ICPP
2005
IEEE
15 years 3 months ago
Exploring Processor Design Options for Java-Based Middleware
Java-based middleware is a rapidly growing workload for high-end server processors, particularly Chip Multiprocessors (CMP). To help architects design future microprocessors to ru...
Martin Karlsson, Erik Hagersten, Kevin E. Moore, D...
ASPDAC
2005
ACM
117views Hardware» more  ASPDAC 2005»
15 years 3 months ago
Dynamic symmetry-breaking for improved Boolean optimization
With impressive progress in Boolean Satisfiability (SAT) solving and several extensions to pseudo-Boolean (PB) constraints, many applications that use SAT, such as highperformanc...
Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Kare...