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ISPASS
2008
IEEE
15 years 6 months ago
Metrics for Architecture-Level Lifetime Reliability Analysis
Abstract— This work concerns metrics for evaluating microarchitectural enhancements to improve processor lifetime reliability. A commonly reported reliability metric is mean time...
Pradeep Ramachandran, Sarita V. Adve, Pradip Bose,...
ISPASS
2008
IEEE
15 years 6 months ago
Program Phase Detection based on Critical Basic Block Transitions
Many programs go through phases as they execute. Knowing where these phases begin and end can be beneficial. For example, adaptive architectures can exploit such information to lo...
Paruj Ratanaworabhan, Martin Burtscher
94
Voted
MICRO
2008
IEEE
159views Hardware» more  MICRO 2008»
15 years 6 months ago
A novel cache architecture with enhanced performance and security
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...
Zhenghong Wang, Ruby B. Lee
MICRO
2008
IEEE
136views Hardware» more  MICRO 2008»
15 years 6 months ago
Power to the people: Leveraging human physiological traits to control microprocessor frequency
Any architectural optimization aims at satisfying the end user. However, modern architectures execute with little to no knowledge about the individual user. If architectures could...
Alex Shye, Yan Pan, Benjamin Scholbrock, J. Scott ...
PIMRC
2008
IEEE
15 years 6 months ago
Joint turbo channel estimation and data recovery in fast fading mobile coded OFDM
Orthogonal frequency division multiplexing (OFDM) system suffers extra performance degradation in fast fading channel due to intercarrier interference (ICI). Combing frequency dom...
Daniel N. Liu, Michael P. Fitz
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