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IESS
2007
Springer
120views Hardware» more  IESS 2007»
15 years 6 months ago
Error Containment in the Time-Triggered System-On-a-Chip Architecture
Abstract: The time-triggered System-on-a-Chip (SoC) architecture provides a generic multicore system platform for a family of composable and dependable giga-scale SoCs. It supports...
Roman Obermaisser, Hermann Kopetz, Christian El Sa...
JSSPP
2007
Springer
15 years 6 months ago
QBETS: Queue Bounds Estimation from Time Series
Most space-sharing parallel computers presently operated by high-performance computing centers use batch-queuing systems to manage processor allocation. Because these machines are...
Daniel Nurmi, John Brevik, Richard Wolski
LCTRTS
2007
Springer
15 years 6 months ago
Enabling compiler flow for embedded VLIW DSP processors with distributed register files
High-performance and low-power VLIW DSP processors are increasingly deployed on embedded devices to process video and multimedia applications. For reducing power and cost in desig...
Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Y...
MSN
2007
Springer
208views Sensor Networks» more  MSN 2007»
15 years 6 months ago
QoS-Aware Cooperative and Opportunistic Scheduling Exploiting Multi-user Diversity for Rate Adaptive Ad Hoc Networks
— The recent researches in wireless networks prompt the opportunistic transmission that exploiting channel fluctuations to improve the overall system performance. In wireless ad...
Zhisheng Niu
104
Voted
OOPSLA
2007
Springer
15 years 6 months ago
Scalable omniscient debugging
Omniscient debuggers make it possible to navigate backwards in time within a program execution trace, drastically improving the task of debugging complex applications. Still, they...
Guillaume Pothier, Éric Tanter, José...