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IPPS
2006
IEEE
15 years 5 months ago
Web server protection by customized instruction set encoding
We present a novel technique to secure the execution of a processor against the execution of malicious code (trojans, viruses). The main idea is to permute parts of the opcode val...
Bernhard Fechner, Jörg Keller, Andreas Wohlfe...
IPPS
2006
IEEE
15 years 5 months ago
Instability in parallel job scheduling simulation: the role of workload flurries
The performance of computer systems depends, among other things, on the workload. This motivates the use of real workloads (as recorded in activity logs) to drive simulations of n...
Dan Tsafrir, Dror G. Feitelson
IPPS
2006
IEEE
15 years 5 months ago
FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...
Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan L...
IPPS
2006
IEEE
15 years 5 months ago
A multiprocessor architecture for the massively parallel model GCA
The GCA (Global Cellular Automata) model consists of a collection of cells which change their states synchronously depending on the states of their neighbors like in the classical...
Wolfgang Heenes, Rolf Hoffmann, Johannes Jendrsczo...
IPPS
2006
IEEE
15 years 5 months ago
A study of MPI performance analysis tools on Blue Gene/L
Applications on todays massively parallel supercomputers rely on performance analysis tools to guide them toward scalable performance on thousands of processors. However, conventi...
I-Hsin Chung, Robert Walkup, Hui-Fang Wen, Hao Yu