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search results - page 115 / 2876
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CVPR
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Inconsistencies in Edge Detector Evaluation
15 years 5 months ago
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Lance A. Forbes, Bruce A. Draper
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2000
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CAS-BUS: A Scalable and Reconfigurable Test Access Mechanism for Systems on a Chip
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Mounir Benabdenbi, Walid Maroufi, Meryem Marzouki
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Cost and Benefit Models for Logic and Memory BIST
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Juin-Ming Lu, Cheng-Wen Wu
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IEEE
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Faster Optimal Single-Row Placement with Fixed Ordering
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Ulrich Brenner, Jens Vygen
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Detecting Undetectable Controller Faults Using Power Analysis
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Joan Carletta, Christos A. Papachristou, Mehrdad N...
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