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search results - page 116 / 2876
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Virtual Fault Simulation of Distributed IP-Based Designs
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Marcello Dalpasso, Alessandro Bogliolo, Luca Benin...
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Influence of Manufacturing Variations in IDDQ Measurements: A New Test Criterion
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Juan M. Díez, Juan Carlos López
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Technology Mapping and Retargeting for Field-Programmable Analog Arrays
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Sree Ganesan, Ranga Vemuri
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An Integrated Temporal Partitioning and Partial Reconfiguration Technique for Design Latency Improvement
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Satish Ganesan, Ranga Vemuri
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Wire-Sizing for Delay Minimization and Ringing Control Using Transmission Line Model
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Youxin Gao, D. F. Wong
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