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ISCA
1998
IEEE
134views Hardware» more  ISCA 1998»
15 years 2 months ago
Exploiting Fine-grain Thread Level Parallelism on the MIT Multi-ALU Processor
Much of the improvement in computer performance over the last twenty years has come from faster transistors and architectural advances that increase parallelism. Historically, par...
Stephen W. Keckler, William J. Dally, Daniel Maski...
ISCA
1998
IEEE
125views Hardware» more  ISCA 1998»
15 years 2 months ago
Active Pages: A Computation Model for Intelligent Memory
Microprocessors and memory systems su er from a growing gap in performance. We introduce Active Pages, a computation model which addresses this gap by shifting data-intensive comp...
Mark Oskin, Frederic T. Chong, Timothy Sherwood
ISCA
1998
IEEE
114views Hardware» more  ISCA 1998»
15 years 2 months ago
The MIT Alewife Machine: Architecture and Performance
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
Anant Agarwal, Ricardo Bianchini, David Chaiken, K...
65
Voted
ISCA
1998
IEEE
122views Hardware» more  ISCA 1998»
15 years 2 months ago
Design Choices in the SHRIMP System: An Empirical Study
The SHRIMP cluster-computing system has progressed to a point of relative maturity; a variety of applications are running on a 16-node system. We have enough experience to underst...
Matthias A. Blumrich, Richard Alpert, Yuqun Chen, ...
ISCA
1998
IEEE
128views Hardware» more  ISCA 1998»
15 years 2 months ago
Analytic Evaluation of Shared-memory Systems with ILP Processors
This paper develops and validates an analytical model for evaluating various types of architectural alternatives for shared-memory systems with processors that aggressively exploi...
Daniel J. Sorin, Vijay S. Pai, Sarita V. Adve, Mar...