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ICCAD
1998
IEEE
15 years 2 months ago
1998
IEEE
This paper presents two new algorithms, Redundant Vector Elimination(RVE) and Essential Fault Reduction (EFR), for generating compact test sets for combinational circuits under th...
VTS
1998
IEEE
15 years 2 months ago
1998
IEEE
This paper presents simulation evidence supporting the use of bit transition maximization techniques in the design of hardware test pattern generators TPGs. Bit transition maximiz...
ISCA
1998
IEEE
15 years 2 months ago
1998
IEEE
Modern cache designs exploit spatial locality by fetching large blocks of data called cache lines on a cache miss. Subsequent references to words within the same cache line result...
ISCA
1998
IEEE
15 years 1 months ago
1998
IEEE
Data compression and prediction are closely related. Thus prediction methods based on data compression algorithms have been suggested for the branch prediction problem. In this wo...
ISCA
1998
IEEE
15 years 2 months ago
1998
IEEE
In the past decade. there has been much literature describing various cache organizatrons that exploit general programming idiosyncrasies to obtain maxrmum hit rate (the probabili...